1. Field of the Invention
The present invention relates to a testing apparatus for simultaneously testing the adaptability to high temperatures of a plurality of semiconductor devices.
2. Description of the Related Art
In general, semiconductor devices such as integrated circuits (hereinafter referred to as IC's ) are subjected to various tests after they are produced by a manufacturing apparatus. One of the tests is to test their adaptability to high temperatures.
A conventional testing apparatus for performing this type of test has a structure as shown in FIG. 8. The apparatus includes a loader heat rail 2 which is sloped for receiving a plurality of IC's 1. The loader heat rail 2 has a heating device (not shown) for heating the IC's 1 and a shutter 3 provided at the inclined lower end thereof. A rotatable rail 4 is pivoted at one end 4a on a lower extension of the loader heat rail 2 and has a shutter 5 provided at the other end thereof. A curved guide rail 6 is disposed below the rotatable rail 4. A testing section 9, which comprises two shutters 7 and two contact mechanisms 8, is formed on the upper portion of the guide rail 6. As shown in FIGS. 9 and 10, each contact mechanism 8 has a plurality of contacts 8a and driving devices 8b for pivoting the contacts 8a into contact with electrode leads 1a of the IC 1 supported by the shutter 7. The contacts 8a are electrically connected to a tester (not shown).
As shown in FIG. 8, the guide rail 6 is curved at the lower portion thereof and a distributor 10 is disposed in front of the lower end of the guide rail 6 for distributing the IC's 1 to one of a plurality of dispensing pipes 10a.
The conventional testing apparatus having the construction described above operates in the following manner.
After a plurality of IC's 1 are supplied to the loader heat rail 2 and heated to a high temperature by the unillustrated heating device, a first one of the IC's 1 is sent out from the loader heat rail 2 to the rotatable rail 4, which is rotated to an upper position illustrated with dashed lines in FIG. 8, by temporarily opening the shutter 3 at the lower end of the loader heat rail 2 and the shutter 5 of the rotatable rail 4. The shutters 3 and 5 are then closed and the rotatable rail 4 carrying the first IC 1 is rotated to a lower position illustrated with a solid line in FIG. 8 in which the rotatable rail 4 is disposed substantially vertically. Thereafter, the shutter 5 is opened so that the first IC 1 received on the rotatable rail 4 falls to the testing section 9 and is supported by the closed lower shutter 7. By repeating the same operation, a second one of the IC's 1 is supplied to the testing section 9 and supported by the upper shutter 7.
In each contact mechanism 8, the contacts 8a are then connected to the leads 1a of the IC 1 by the driving devices 8b. In this state, testing of the IC's 1 set in the testing section 9 is conducted by the unillustrated tester connected to the contacts 8a.
After testing of the IC's 1 is completed, the contacts 8a of the lower contact mechanism 8 are separated from the leads 1a of the first IC 1 by the driving devices 8b and the lower shutter 7 is opened to send out the first IC 1 to the distributor 10. This first IC 1 can be classified into several classes according to the results of the test and is introduced into one of the dispensing pipes 10a corresponding to its respective class by the distributor 10 so that the first IC 1 is dispensed from this testing apparatus through the pipe 10a. The second IC 1 is then sent to the distributor 10 and classified and dispensed from this testing apparatus through a suitable pipe 10a.
Subsequently, by repeating the above described operation, the next two IC's 1 are tested and dispensed from the testing apparatus. The IC's 1 are subjected to the high temperature adaptability test two by two in this manner.
As described above, however, in the conventional testing apparatus, the following operations are conducted in series: separation of the contacts 8a from the leads 1a of the IC's 1, classifying and dispensing of the IC's 1, supply of the next IC's 1 to the testing section 9, and bringing the contacts 8a into contact with the leads 1a of these next IC's 1. Accordingly, there is a lot of wasted time in which the tester is not being operated, thereby reducing the testing capacity of the semiconductor device testing apparatus.
If the testing section 9 has three or more contact mechanisms 8 and shutters 7, a larger number of IC's 1 can be tested simultaneously. The waiting time of the tester, however, increases in proportion to the number of IC's 1 to be tested simultaneously. As a result, the rate of operation of the tester can not be improved.